Recently, a board laminating process such as a build up process as a circuit mounting of an electronic instrument such as a cell phone, a personal computer, a video instrument, a game machine and the like is brought into an extensive use. This build up process involves a through hole or a via hole provided in a laminate board, and a metal precipitated in such a fine pore serves to establish a connection between the circuit layers thereby enabling a multi-lamination of the circuit. Among such fine pores, the blind via hole is subjected, for the purpose of precipitating a metal therein, to a conformal via hole plating or a via filling plating.
Nevertheless, the via hole plating in which a metal film is formed on the inner wall and the bottom of the via hole involves a difficulty in mounting a conductive layer further on the pore and requires the metal film precipitating area to be increased for ensuring a sufficient current conduction upon establishing a connection between the circuit layers.
On the other hand, a via filling process for filling a via hole with a metal allows a pore to be filled completely, and is extremely advantageous for a down-sizing since another via hole can be formed further on this pore if the surface of the via hole part after the filling is flat. Accordingly, as a substitute for a conformal via hole plating having a limitation in making an insulant (insulating layer) with flat surface, a so-called via filling plating to fill an inter-layer connecting pore (hole) is increasingly brought into use.
As the via filling technology, a copper plating bath containing a condensate of an amine with a glycidyl ether and/or a quaternary ammonium derivative of said condensate has already been known (Patent document 1).
Nevertheless, this technology involved a difficulty in accomplishing a voidless filling of a high-aspect via for a tridimensional mounting such as a blind via hole, a through hole and a through-silicon electrode having a small via diameter to meet a recent demand for structure refinement, although it can readily accomplish the filling of a blind via hole having a large via diameter (10 μm or more) and a relatively small via aspect ratio (via depth/via diameter) (1 or less). A copper plating for LSI can accomplish a filling for up to an aspect ratio of 4 to 5 when the diameter is relatively large (100 nmφ or more) even in a conventional one, but it has a difficulty in accomplishing a satisfactory filling for a recent blind via hole having a smaller diameter.
As a method for precipitating a copper on a print circuit board, the addition of a leveling agent which is a reaction product of a compound selected from imidazoles and the like with an ether bond-containing polyepoxide compound and which has a specific polydispersion degree, into a copper plating bath (Patent document 2).
However, this technology requires the molecular weight distribution to be controlled since the aforementioned reaction product is obtained as being polymerized, resulting in necessity of an enormous effort for accomplishing a consistent production of a leveling agent having an ideal polydispersion degree.